Binary-Compatible Deterministic Simulation for Distributed Systems.

Boot thousands of microcontrollers, wire them via virtual buses, and synchronize with 3D physics engines. Perfect lockstep. Zero jitter. Bit-for-bit reproducible.

virtmcu — simulation-log

Escape the Simulation Trap.

The Old Way

Physical testbenches are slow and expensive. Traditional emulators force a compromise between speed and flexibility. When you introduce physics engines, synchronization breaks down completely—spawning "ghost bugs" that are impossible to reproduce.

The VirtMCU Way

Absolute Determinism. Every network packet, CPU cycle, and physics frame advances in perfect lockstep. If your firmware runs today, it runs exactly the same tomorrow. Bit-for-bit reproduction, guaranteed.

Architected for Absolute Determinism

Zero-Jitter Execution Engine

The core TCG loop runs decoupled from wall-clock time. Host OS preemption and thread pausing have absolutely zero impact on the simulated progression of time.

SystemC TLM-2.0 Integration

Bring your Verilated hardware and FPGA IP directly into the simulation mesh over a high-throughput, low-latency UDP data plane.

Rust-Native Extensibility

Write peripheral models in memory-safe Rust. Dynamic plugins load instantly via FFI boundaries without forcing you to recompile the QEMU core.

Cyber-Physical Boundaries

Translate virtual MMIO register writes directly into simulated physical torque, force, and acceleration within MuJoCo or NVIDIA Omniverse.

Zero Compromise on Speed.

Run thousands of nodes faster than real-time without sacrificing an ounce of deterministic precision.

600+
TCG Throughput (MIPS)
0ns
Inter-Node Jitter
< 1ms
Physics Latency